1. Technical Field
The present disclosure relates to the field of memory devices. More particularly, it relates to a memory device supporting test techniques such as Design For Test (DFT) and write-through modes.
2. Background
It is known for a memory device to be configured to operate, as well as in a regular read or write mode, in a test mode in which test techniques such as DFT are used to test that circuitry operates as intended. One way in which such techniques can be used is to provide a particular, known set of values to peripheral logic and then to collect the output. The output can then be tested against some expected values to ensure that the peripheral logic worked as expected.
In using DFT techniques, it is important that in a test mode of operation, the system operates in a similar way to how it would in a normal mode of operation. If this is not the case, then doubt may be cast on the reliability of the results of applying DFT techniques.
Note that the term “test mode” is intended to cover both a “DFT mode” and any supported “write-through mode” that involves both writing data to memory and providing that data as an output.